Along with the supply of portable telephones, portable computers, and other small-scale electronic equipment, the demand for miniaturization of semiconductor devices mounted on them has increased. In semiconductor devices with LGA (Land Grid Array) and BGA (Ball Grid Array) structures, since an external connecting terminal as an interface to an external substrate can be two-dimensionally disposed on the bottom face of the semiconductor devices, its miniaturization is appropriately realized. In semiconductor devices with LGA and BGA structures, there is a type in which a semiconductor chip is mounted with the face down on a substrate and a type in which a semiconductor chip is mounted with the face up on a substrate. As the latter, semiconductor devices with a wire bonding system in which the semiconductor chip mounted with the face up on the substrate is electrically connected to the substrate by wire-bonding are broadly supplied.
A semiconductor device of the wire bonding system, for example, is manufactured through a process that prepares a substrate equipped with several chip mounting regions on its surface, a process that mounts a semiconductor chip via an adhesive in each chip mounting region of the above-mentioned substrate, a process that seals the semiconductor chip on the above-mentioned substrate with a molding resin, a process that forms bump electrodes for connecting an external substrate on the back face of the above-mentioned substrate, and a process that separates individual semiconductor devices by dicing the above-mentioned substrate.
As shown in FIG. 8, on the substrate of the above-mentioned substrate 100, conductor patterns 101 are formed in advance by etching treatment of a copper foil. The conductor patterns 101 include electrode part 101a for wire connection through wire bonding to a semiconductor chip in an external region of a chip mounting region 102, an electrode part 101b for a bump connection to bump electrodes for connecting an external substrate via holes, and circuit part 101c for connecting two electrode parts 101a and 101b. Since the circuit parts 101c and the electrode parts 101b for a bump connection of the conductor patterns 101 are also formed in the chip mounting region 102, it is necessary to prevent a short circuit of the semiconductor chip and the conductor pattern 101 when the semiconductor chip is mounted on the substrate 100.
In the above-mentioned conventional substrate 100, in order to prevent a short circuit of the semiconductor chip and the conductor pattern 101, an insulating layer (solder resist) 103 interposed between the semiconductor chip and the conductor pattern 101 is formed in the chip mounting region 102. The insulating layer 103 is formed by spreading a thermosetting insulator on the entire area of the chip mounting region 102 and thermally curing it. However, in the manufacture of the above-mentioned semiconductor device, since a flexible insulating film formed of polyimide resin is used as the substrate 100, the substrate is warped by curing contraction, etc., of the insulating layer 103, and if the warp exceeds an allowable amount, the following multiple problems result.                (1) In the manufacturing processes of the semiconductor device, when the substrate is set in a jig for conveying the substrate, if the warp of the substrate is large, the substrate cannot be effectively fixed to a positioning pin of the above-mentioned jig.        (2) In the manufacturing processes of the semiconductor device, when the semiconductor chip on the substrate is sealed with resin, if the warp of the substrate is large, the substrate cannot be effectively fixed to a positioning pin of a mold for molding, and problems result.        (3) In the manufacturing processes of the semiconductor device, when the semiconductor chip is mounted on the substrate, the substrate is set in a jig for forcing it into a planar state, an adhesive is spread on the substrate surface, and the semiconductor chip is mounted on it. However, if the warp of the substrate is large, when the substrate is removed from the jig, the warp of the substrate returns, so that bubbles (spaces) are generated between the adhered surface of the semiconductor chip and the insulating layer of the substrate, resulting in package cracks (appearance inferiority) and chip cracks. In particular, in a thin semiconductor device (1 mm or less), since the semiconductor chip is thin, it is necessary to set the amount of adhesive at a small amount so that the adhesive will not run into the semiconductor chip. For this reason, the warp of the substrate cannot be adsorbed by the low amount of adhesive, and bubbles are easily generated.        
The objective of the present invention is to provide a semiconductor chip mounting substrate and a semiconductor device that not only can prevent the generation of problems due to the warp of the substrate in the manufacturing processes of the semiconductor device by reducing the warp of the substrate due to curing contraction, etc., of an insulation pattern while forming the insulation pattern on the surface of the substrate so that it may be interposed between a semiconductor chip and a conductor pattern, but can prevent the generation of package cracks and chip cracks due to the warp of the substrate in the manufactured semiconductor device.